Hotspot mitigation, thermal management paths, and thermomechanical degradation are key challenges for 3D integration, in particular due to the increased quantity and complexity of “thermally critical” interfaces. The semiconductor industry (ranging from low-power portables to microprocessors and power ASICs) is deeply concerned about handling the high heat fluxes and the related failure mechanisms in 3D stacked die and advanced packaging structures.
We are developing a broad spectrum of nanostructured materials with targeted combinations of thermal, mechanical, optical, electrical, and other properties, including very low thermal resistance and robustness during thermal cycling. Ongoing work includes novel underfill materials, encapsulation, and 3D chip attachment. This includes disordered mixtures of combinations of nanowires or porous structures, and we are developing metrology for distributed thermal, mechanical, and electrical properties as well as their evolution with temperature cycling. We extended our novel measurement strategy for the in-plane elastic modulus of nano materials based on a micromechanical resonator approach.
A major historic effort, still ongoing, is the development of mechanically compliant interfaces with high thermal conductivities. The number of interfaces renders 3D designs particularly vulnerable to thermal cycling, which tends to increase interface resistances through void formation and chemical diffusion. There is an urgent need for thermal and thermomechanical techniques that address the specific interface challenges in TSV-enabled material systems and geometries. Our past work in this area has focused on thermal interface materials based on aligned carbon nanotube films. More recently we are focussed on the use of micro and nanostructured metals for this purpose, including metal inverse opal structures, thereby achieving more robust solutions that can be integrated with a variety of promosing materials such as PDMS.