Abstract

This letter solves a major hurdle that mars photolithography-based fabrication of micro-mesoscale
structures in silicon. Conventional photolithography is usually performed on smooth, fat wafer
surfaces to lay a 2D design and subsequently etch it to create single-level features. It is, however,
unable to process non-fat surfaces or already etched wafers and create more than one level in the
structure. In this study, we have described a novel cleanroom-based process fow that allows for easy
creation of such multi-level, hierarchical 3D structures in a substrate. This is achieved by introducing
an ultra-thin sacrifcial silicon dioxide hardmask layer on the substrate which is frst 3D patterned via
multiple rounds of lithography. This 3D pattern is then scaled vertically by a factor of 200–300 and
transferred to the substrate underneath via a single shot deep etching step. The proposed method is
also easily characterizable—using features of diferent topographies and dimensions, the etch rates
and selectivities were quantifed; this characterization information was later used while fabricating
specifc target structures. Furthermore, this study comprehensively compares the novel pattern
transfer technique to already existing methods of creating multi-level structures, like grayscale lithography and chip stacking. The proposed process was found to be cheaper, faster, and easier to
standardize compared to other methods—this made the overall process more reliable and repeatable.
We hope it will encourage more research into hybrid structures that hold the key to dramatic
performance improvements in several micro-mesoscale devices.