Thermal Mapping of Interconnects Subjected to Brief Electrical Stresses,

Ju, Y.S., and Goodson, K.E., 1997, "Thermal Mapping of Interconnects Subjected to Brief Electrical Stresses," IEEE Electron Device Letters, Vol. 18, pp. 512-514.

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The failure of metal interconnects subjected to brief electrical-current pulses is a reliability concern for the integrated circuits industry, especially in connection with electrostatic discharge (ESD). Since the magnitude and spatial distribution of the temperature rise during pulsing events strongly influence these failures, the development of suitable thermometry techniques is needed to understand the failure. This work reports scanning laser-reflectance thermometry with a novel calibration procedure, which captures transient temperature distributions along interconnects subjected to sub-microsecond current pulses. The temperature distribution is strongly affected by corners and contact pads and by the pulse duration.

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